All Processor-Controlled Test configurations require a Test Controller Card (PCI-200EJ). The Processor-Controlled Test software connects the PCI-200EJ to the Debug Port of the UUT processor via a Processor Control POD.
The PCI-200EJ Pod translates generic signal levels and protocols produced by the controller card so that they match the requirements of the specific processor. The pod is connected to the debug port of the UUT processor.
If the UUT doesn't have an on-board JTAG header, but the CPU is socketed, an interposer can be placed between the CPU and socket to provide access to the JTAG lines. The standard JTAG header on the interposer is then connected to the processor control POD.
The optional I/O Emulation unit allows I/O ports to be verified right out to external connectors during Processor-Controlled testing. Programmable cards are available for the I/O Emulation unit to generate and measure analogue and digital signals.